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Deim Seminar

Title

DRAC: Designing RISC-V-based Accelerators for next generation computers

Conferenciant

Miquel Moret

Professor/a organitzador/a

Oriol Farrs Ventura

Institution

UPC i BSC

Date

31-03-2022 14:15

Summary

Designing RISC-V-based Accelerators for next generation Computers (DRAC) is a 3-year project (2019-2022) funded by the ERDF Operational Program of Catalonia 2014-2020. DRAC will design, verify, implement and fabricate a high performance general purpose processor that will incorporate different accelerators based on the RISC-V technology, with specific applications in the field of security, genomics and autonomous navigation. In this talk, we will provide an overview of the main achievements in the DRAC project, including the fabrication of Lagarto, the first RISC-V processor developed in Spain.

Place

Sala de Graus

Language

Angls